Fault Validation Utilizing a Real-Time Power Hardware-in-the-Loop Approach for Distribution Feeders with Photovoltaic Systems
Rachid Darbali-Zamora1,2, Matthew J. Reno1, Javier Hernandez-Alvidrez1, Adam Summers1, Jay Johnson1
1Renewable and Distributed Systems Integration, Sandia National Laboratories, Albuquerque, NM, United States
/2University of Puerto Rico - Mayaguez Campus, Mayaguez, PR, United States

Power outages are one of the greatest challenges that utility companies must face, affecting millions of customers, and costing billions in damages. For this reason, there is a need for developing approaches that help understand the effects of fault conditions on the power grid. The use of Real-Time (RT) Power Hardware-in-the-Loop (PHIL) enables the integration of a hardware component into a simulated environment. One of the limitations in implementing RT PHIL is the size restrictions on distribution models. To run time-domain feeder simulations requires reduction techniques to be implemented to obtain equivalent models that can be uploaded into the PHIL platform. Herein, a circuit reduction technique is used to obtain an equivalent model of an existing distribution system. MATLAB/Simulink/RT-Labs is used to simulate the reduced distribution system, based on the obtained OpenDSS parameters. Three different faults are applied at three different bus locations in the distribution system.  A comparison between OpenDSS simulation results and the Opal-RT experimental results are used to verify fault currents.

Area: Sub-Area 10.2: Grid Integration, High-penetration PV and Energy Storage