Bias-Voltage Photoconductance Measurements for Determining Interface Properties of SiO2/Al2O3 Passivation Stacks Deposited on Silicon |
Christian Reichel Fraunhofer ISE, Freiburg, --, Germany |
The paper presents an advanced measurement method for controlling the surface charge carrier density of silicon wafers passivated with SiO2/Al2O3 stacks during photoconductance (PCD) measurements by employing semi-transparent PEDOT:PSS electrodes with an applied bias voltage. This is employed to study and analyze charge carrier dynamics in dielectric layers by measuring their direct influence on effective lifetime of n- and p-type samples, from which the fixed charge carrier density Qf of the passivation can be directly extracted and from which the defect density Dit can be derived from the minimum lifetime values at flatband-voltage. In SiO2/Al2O3 passivation stacks with varying SiO2 interlayer thickness, it was shown that by changing the SiO2 thickness, the carrier density Qf can be tuned to a wide range of values whereas an increase in interlayer thickness resulted in a decrease in Qf. Varying the SiO2 thickness, the behavior of the respective effective lifetime under bias voltage also changes, exhibiting hysteresis-like effects, which are attributed to additional charges getting trapped at the surface during bias voltage application. This effect is much more pronounced for samples with a thinner SiO2 layer as well as for the n-type samples. Additionally, the doping type also influences the magnitude of Qf, with p-type samples generally reaching lower absolute values. The measurements were realized by a cost-effective and easy-to-use microcontroller-based potentiostat which can be used as a simple add-on to existing PCD measurement setups. |